asic design

Products

IntelliProp Storage Interface Cores

IntelliProp Inc. also provides industry-proven RTL storage interface cores. Initially developed as a mechanism to develop and validate IntelliProp eVCs, these cores have undergone extensive testing and rigorous verification through pseudo-ramdom simulation.  Additionally, the cores have been synthesized to FPGA prototypes which are currently being used and tested by major disk drive manufacturers.

IPR-CE100C/IPR-CE200C:  CE-ATA Host and Device Cores
The IPR-CE200C is an RTL core implementing a CE-ATA or a MMC-ATA device interface. The IPR-CE100C is an RTL core implementing a CE-ATA or a MMC-ATA host interface. Both cores are intended to be integrated into system-on-a-chip ASIC's. The protocol interface is compliant to the CE-ATA specification as defined by the CE-ATA consortium as well as the ATA over MMC specification.
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IPR-SS100C/IPR-SS200C:  SAS Host and Device Cores
The IPR-SS100C is an RTL core implementing a Serial Attached SCSI (SAS) host interface intended to be integrated into a system-on-a-chip ASIC. The IPR-SS200C is an RTL core implementing a SAS device interface.  The protocol interface is compliant to the SAS specification as defined by the ANSI T10 Organization.
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IPR-ST100C/IPRST200C:  SAS/SATA Dual-Boot Host and Device Cores

The IPR-ST100C is an RTL core implementing a dual boot SATA and Serial Attached SCSI (SAS) host interface intended to be integrated into a system-on-a-chip ASIC. The IPR-SS200C is an RTL core implementing a SAS/SATA device interface.  The protocol interface is compliant to the SAS specification as defined by the ANSI T10 Organization and the SATA2 specification as defined by the Serial ATA International Organization.
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IPR-SA100C/IPR-SA200C:  SATA Host and Device Cores
The IPR-SA100C is an RTL core implementing a SATA2 host interface intended to be integrated into a system-on-a-chip ASIC. The IPR-SA200C is an RTL core implementing a SATA2 device interface.  The protocol interface is compliant to the SATA2 specification as defined by the Serial ATA International Organization.
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IPR-CF100C/IPR-CF200C:  ATA/CF+ (True IDE) Host and Device Cores
The IPR-CF100C is an RTL core implementing an ATA host interface intended to be integrated into a system-on-a-chip ASIC for Compact Flash+ or IDE applications. The IPR-CF200C is an RTL core implementing an ATA device interface.  The protocol interface is compliant to the ATA, revision 7 specification and the Compact Flash specification.
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