Est. 1998 — Longmont, Colorado

Built on
25 Years
of Silicon

IntelliProp is a Longmont, Colorado semiconductor IP company that has been designing, verifying, and shipping silicon-proven IP cores since 1998 — from the Front Range to data centers worldwide.

1998 Founded

30+ Silicon-Proven Cores

6 Standards Consortia

1st CXL Memory Fabric

// Our Story

Precision Engineering
Since the Beginning

IntelliProp was founded in Longmont, Colorado in 1998 with a single mission: deliver silicon-proven ASIC design expertise to the memory and storage industry. What started as ASIC design and verification services grew into one of the deepest IP core portfolios in the industry.

Over 25 years, our engineers have built and taped out IP for every major storage and memory protocol — SATA, SAS, NVMe, Gen-Z, and now CXL. We don't just follow the standards roadmap; we help write it. IntelliProp holds seats in the CXL Consortium, PCI-SIG, JEDEC, NVM Express, ONFI, and SATA-IO.

In 2023, IntelliProp became first to market with a fully disaggregated, composable CXL memory fabric — the Omega platform. Built from the same discipline that produced 30+ silicon-proven cores, Omega is IntelliProp's bet on the next 25 years of data center architecture.

CXL Omega Platform IP Core Catalog

Company Profile ACTIVE

Founded 1998 — Longmont, Colorado

Headquarters 105 S. Sunset St., Suite N

Specialization Semiconductor IP & ASIC Design

IP Portfolio 30+ Silicon-Proven Cores

Protocols CXL, NVMe, SATA, SAS, Gen-Z, AES

Consortia CXL, PCI-SIG, JEDEC, NVMe, ONFI, SATA-IO

FPGA Partners Intel PSG, Xilinx/AMD, Achronix, Lattice

Milestone First CXL Memory Fabric to Market

// How We Work

Standards First.
Silicon Proven.

Standards Leadership

We don't react to standards — we participate in writing them. Active membership in CXL Consortium, PCI-SIG, JEDEC, NVM Express, ONFI, and SATA-IO means our IP ships ahead of the curve.

Rigorously Verified

Every core goes through pseudo-random simulation, functional coverage analysis, and regression testing before it's called silicon-proven. No shortcuts — the data centers that run on our IP can't afford them.

Partner Depth

We work closely with Intel PSG, Xilinx/AMD, Achronix, and Lattice on the FPGA side, and with Cadence, Mentor, and Avery on verification — embedding into your team with complete flow coverage.

// Leadership

The Team Behind the IP

Hiren Patel

CEO & Co-Founder

Hiren co-founded IntelliProp in 1998, channeling 25+ years of ASIC design and verification expertise into every product the company ships. His deepest credential isn't a title — it's that he served as President of the Gen-Z Consortium, helping author the very standards IntelliProp now implements in silicon. That insider positioning — knowing where protocols are heading before the spec is ratified — is a direct competitive advantage built into the Omega platform and every IP core in the catalog.

BS EE — Texas A&M MSCE — NTU Gen-Z Consortium President

LinkedIn →

Tracy Spitler

Chief Technology Officer

Tracy is the engineering spine of IntelliProp, with a career built on making complex memory and storage protocols work in real silicon. Dual engineering degrees from Ohio State and hands-on mastery of SATA, SAS, NVMe, Gen-Z, CXL, NVDIMM, and RAID give him a design depth that spans the entire IP catalog. Where Hiren maps the standards roadmap, Tracy owns the implementation — the reason IntelliProp's cores arrive silicon-proven, not just specification-compliant.

BSEE — Ohio State MSEE — Ohio State Storage & Memory Protocols

LinkedIn →

// Standards Membership

Standards We Help Shape

IntelliProp actively participates in the working groups that define next-generation memory and storage architecture. Membership is not passive — our engineers contribute directly to spec development.

CXL Consortium

Composable memory interconnect — the foundation of the Omega platform

PCI-SIG

PCIe standards body — the physical layer beneath CXL, NVMe, and more

JEDEC

Memory interface standards — DDR5, LPDDR, HBM, and NVDIMM specifications

NVM Express

NVMe host controller interface — defining SSD protocol from the ground up

ONFI

Open NAND Flash Interface — raw flash controller interoperability

SATA-IO

Serial ATA standards — the bedrock of IntelliProp's earliest IP cores

// Technology Partners

Ecosystem Partners

IntelliProp's IP cores are qualified and validated across industry-leading FPGA platforms and EDA toolchains, ensuring complete design-to-silicon coverage for every customer engagement.

// FPGA Platforms

// EDA & Verification

// Other Partners

Built on 25 Years of Silicon

Precision EngineeringSince the Beginning

Standards First.Silicon Proven.